MIPS

 Content

1.    1.      Introduction of MIPS

1.1  Definition of MIPS

1.2  Definition of SPIM

1.3  Instruction set

1.4  The Organization of a Computer

1.5  Introduction of MIPS R2000

1.6  Memory Allocation

1.7  Data Alignment

2.      Microprocessor Operations

     2.1 Machine Cycle

3.      Registers

     3.1 MIPS Register Convention

     3.2 Trap Registers

4.      System calls

      4.1 System Call Function

      4.2 MIPS Assembly Language Program Format

5.      Data representation

       5.1 Character Representation

       5.2 Number Representation

1.      Introduction of MIPS

1.1  Definition of MIPS

MIPS (Microcomputer without Interlocked Pipeline Stages) is a reduced instruction set computer that developed by MIPS Technology, Inc. The early MIPS architectures are MIPS I, MIPS II, MIPS III, MIPS IV and MIPS V. The current MIPS architectures are MIPS 32 and MIPS 64.  MIPS  is a load or store architecture which means all the instructions must use registers as operands (MIPS 32 have 32 bits or 4 bytes register file).

1.2  Definition of SPIM

SPIM is a simulator for MIPS architecture that

·         can read the assembly language and translate to the machine language

·         provide a simple debugger

·         execute the machine language instructions

1.3  Instruction Set

Instruction Set Architecture (ISA) is the interface between a user and a microprocessor. ISA includes instruction set, rules for using instructions (mnemonics, functionally, addressing modes) and instruction encoding.

MIPS CODE INSTRUCTION SET

NAME	MNEMONIC	FORMAT	OPCODE	FUNCTION(HEX)
Add	add	R	0	20
Add Immediate	addi	I		8
Add Imm. Unsigned	addiu	I		9
Add Unsigned	addu	R	0	21
And	and	R	0	24
And Immediate	andi	I		c
Branch On Equal	beq	I		4
Branch On Not Equal	bne	I		5
Jump	j	J		2
Jump and Link	jal	J		3
Jump Register	jr	R	0	08
Load Byte Unsigned	lbu	I		24
Load Halfword Unsigned	lhu	I		25
Load Linked	ll	I		30
Load Upper Imm.	lui	I		f
Load Word	lw	I		23
Nor	nor	R	0	27
Or	or	R	0	25
Or Immediate	ori	I		d
Set Less Than	slt	R	0	2a
Set Less Than Imm.	slti	I		a
Set Less Than Imm. Unsigned	sltiu	I		b
Set Less Than Unsigned	sltu	R	0	2b
Shift Left Logical	sll	R	0	00
Shift Right Logical	srl	R	0	02
Store Byte	sb	I		28
Store Conditional	sc	I		38
Store Halfword	sh	I		29
Store Word	sw	I		2b
Subtract	sub	R	0	22
Subtract Unsigned	subu	R	0	23

Note:

* R-format

* J- format

* I- format

1.4  The Organization Of a Computer

     ·         The five components of a computer :

(a)    Input

(b)   Output

(c)    Memory

(d)   Datapath (ALU)

(e)   Control

               

The Organization of a Microproccesor

1.  Datapath (ALU)  – perform arithmetic operation.
2. Control – the component of a processor that send the signals that determine the operation    of  the datapath, memory, input and output.      
3. Memory – the storage area where programs are kept when the programs is running and contains data needed by the running programs.
4. Input – devices that writes data to memory
5. Output – devices that reads data from memory and convey result of the computation.

1.5  Introduction of MIPS R2000

The first commercial MIPS model, R2000 was announced in 1985. It could be booted either big-endian or little-endian. It had thirty-two (32) bits general purpose registers, but no condition code register which the designers considered it a potential bottleneck.

MIPS R2000 Architecture

1.6  Memory Allocation

MIPS processor typically divide memory into three parts:

     a)   Text segment – holds the machine language code for instructions in the source file.

     b)   Data segment – holds the data that the program operates on.

 (i)                 Static data – contains data that are statically allocated whole size does not change as the program access them.

 (ii)               Dynamic data – allocated and deallocated by the program executes.

     c)    Stack segment – resides at the top of user address space. In a high level language program, local variables and parameters are pushed and popped on the stack as the operating systems expands and shrink the stack segment toward the data segment.

  

Memory Layout

7FFFFFFFhex		Stack segment
	Dynamic data	Data segment
	Static data
10000000hex		Text segment
400000hex	Reserved

1.7  Data Alignment

MIPS data size

Type	Size (binary)	Size (hexadecimal)
Byte	8 bits	2 bits
Word	4 bytes (32 bits)	8 bits
Double word	8 bytes (64 bits)	16 bits

Data alignment

Double word
Word				Word
Half word		Half word		Half word		Half word
Byte	Byte	Byte	Byte	Byte	Byte	Byte	byte

2. Microprocessor Operation

Most processors will repeat three basic steps to execute one machine cycle.

Fetch

•            Use the program counter (PC) to supply the instruction address.
•             Fetch the instruction from memory.
•             Update the PC.

Decode

•             Decode the instruction.

Execute

•            Read registers
•             Execute instruction
•            Write the results to memory (if necessary)

Machine Cycle

3.  Registers

3.1 MIPS Register Convention

MIPS REGISTER CONVENTION

Register name (Mnemonic name)	Register number	Usage
$zero	0	Constant 0
$at	1	Assembler temporary (reserved)
$v0 - $v1	2 – 3	Expression evaluation and results of a subroutine
$a0 - $a3	4 – 7	Arguments to a subroutine
$t0 - $t7	8 – 15	Temporary (not preserved across a function call)
$s0 - $s7	16 – 23	Saved temporary (preserved across a function call)
$t8 - $t9	24 – 25	More temporary
$gp	28	Global pointer (preserved on call)
$sp	29	Stack pointer (preserved on call)
$fp	30	Frame pointer (preserved on call)
$ra	31	Return address (automatically used in some instructions)

Note :

*often be used in R-format and I-format

3.2 Trap Registers

Co processor 0 contains exception control registers that handles exceptions. SPIM does not implement all of Co processor 0’s registers, since they are not much useful in a simulator or part of the memory system, which is not implemented. However, it does provide trap registers.

Trap Registers

Register name	Register number	Usage
BadVAddr	8	Memory address at which address exception occurred
Status	12	Interrupt mask and enable bits
Cause	13	Exception type and pending interrupt bits
EPC	14	Address of instruction that caused exception

4.  System call

4.1 System call function

SPIM simulator for MIPS architecture provides an “exception handler” that simulates a tiny operating system. Assembly programs request a service by loading the system call (syscall) instruction.

Example 1:

Exception handler

System call function 

Service	System call code	Arguments	Result
print_int	1	$a0 = integer
print_float	2	$f12 = float
print_double	3	$f12 = double
print_string	4	$a0 = string
read_int	5		$v0 = integer
read_float	6		$f0 = float
read_double	7		$f0 = double
read_string	8	$a0 = buffer $a1 = length
sbrk (allocate memory)	9	$a0 = amount
exit	10		$v0 = address
print_char	11	$a0 = char
read_char	12		$v0 = char

Example 2: exit program

4.2 MIPS Assembly Languages Program Format

MIPS program have a format that comprises of four columns:

Example 3:

Column 1: Label (Optional)

·         A label is used to mark a specific point in the program code.

·         When the instruction of BRANCH or JUMP call for a specific label, the program will execute from the point of the label is situated.

Column 2: Opcode (OPERATION CODE)

·         Opcode is the field that denoted the basic operation and format of an instruction. Mnemonic language is used rather than hexadecimal code for the purpose of simplicity and readability.

Column 3: Operand

·         Operand contain registers, shift amount, label to jump into and constant address.

Column 4: Comment

·         Comments is anything that follows ‘#’ on a line.

 5. Data Representation

5.1 Character Representation

·         An eight bit is a byte. A character can be represented with one byte.

·         Most computers often 8-bit byte to represent characters following the American Standard code for Information Interchange (ASCII) as the standard for character representations.

Example :

This example is to assemble the ASCII bit patterns which asked to be placed in memory.

Bit patterns formed in hexadecimal :

Bit patterns formed in decimal :

·         The .asciiz part of the source code asked the assembler to assemble the characters between the quote marks into ASCII bit pattern.

·         The numbers represent hexadecimal system or the front of each number can be written as 0x.

·         Example: The first character, “A“, corresponds to the bit pattern 0x41

·         The final bit pattern 0 x 00 (NUL) is used by the assembler to show the end of the string of characters.

ASCII Representation of Characters

Dec	Hex	Char	Dec	Hex	Char	Hex	Dec	Hex
32	20	SPACE	33	21	!	34	22	“
35	23	#	36	24	$	37	25	%
38	26	&	39	27	‘	40	28	(
41	29	)	42	2A	*	43	2B	+
44	2C	,	45	2D	-	46	2E	.
47	2F	/	48	30	0	49	31	1
50	32	2	51	33	3	52	34	4
53	35	5	54	36	6	55	37	7
56	38	8	57	39	9	58	3A	:
59	3B	;	60	3C	<	61	3D	=
62	3E	>	63	3F	?	64	40	@
65	41	A	66	42	B	67	43	C
68	44	D	69	45	E	70	46	F
71	47	G	72	48	H	73	49	I
74	4A	J	75	4B	K	76	4C	L
77	4D	M	78	4E	N	79	4F	O
80	50	P	81	51	Q	82	52	R
83	53	S	84	54	T	85	55	U
86	56	V	87	57	W	88	58	X
89	59	Y	90	5A	Z	91	5B	[
92	5C	\	93	5D	]	92	5E	^
95	5F	_	96	60	`	97	61
98	62	b	99	63	c	100	64	d
101	65	e	102	66	f	103	67	g
104	68	h	105	69	i	106	6A	j
107	6B	k	108	6C	l	109	6D	m
110	6E	n	111	6F	o	112	70	p
113	71	q	114	72	r	115	73	s
116	74	t	117	75	u	118	76	v
119	77	w	120	78	x	121	79	y
122	7A	z	123	7B	{	124	7C	|
125	7D	}	126	7E	~	127	7F	DEL

5.2 Number Representation

Although computers operate on binary numbers, in MIPS number is represented in  decimal system. When you need to insert number into a register, you have to remember what kind of number system that you want to write in the program.

For example, to load number 16 into register $5